1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, particularly a semiconductor device including a fully silicided gate electrode and a manufacturing method therefor.
2. Description of the Related Art
In relation to the transistor structures in recent years, a further reduction in the microscopic size of insulated gate type field effect transistors using a silicon oxide film (these field effect transistors will hereinafter be referred to as MOSFET) has been advanced. However, when thinning of a gate insulating film is advanced along with the proportional reduction of the MOSFET, an increase in the gate leak current due to the tunnel current becomes a problem. In order to obviate this problem, researches of MOSFETs having a gate insulating film formed by use of a high dielectric constant material (high dielectric constant gate insulating film) have been made.
On the other hand, polycrystalline silicon with an impurity added thereto is used as a material for gate electrodes of MOSFETs. Since the material is a semiconductor, however, the surface of the gate electrode would undergo a little depletion, causing a lowering in the current driving force of the transistor. As a countermeasure against this problem, a Fully Silicided gate (FUSI) technology in which the gate electrode is wholly silicided has come to be investigated.
Besides, in recent years, from the viewpoints of reducing the gate leak current and simultaneously suppressing the depletion of the gate electrode, researches have been made of application of a gate stack structure based on a combination of the high dielectric constant gate insulating film with the FUSI technology to MOSFETs (refer to Motofumi Saitoh et al., “Strain Controlled CMOSFET with Phase Controlled Full-silicide (PC-FUSI)/HfSiON Gate Stack Structure for 45 nm-node LSTP Devices”, 2006 Symposium on VLSI Technology Digest of Technical Papers, 2006 IEEE, 2006).
FIGS. 8A to 8D show an example of a method of manufacturing a semiconductor device having the above-mentioned gate stack structure. First, as shown in FIG. 8A, a polysilicon gate electrode 103 is formed in a pattern over a silicon substrate 101, with a high dielectric constant material gate insulating film 102 therebetween. Thereafter, as shown in FIG. 8B, insulating side walls 104 are formed at side walls of the gate insulating film 102 and the gate electrode 103. Next, an insulating film 105 is formed so as to bury the gate electrode 103 and the side walls 104, and the insulating film 105 is flattened by CMP (Chemical Mechanical Polishing), thereby exposing the gate electrode 103. Subsequently, as shown in FIG. 8C, a nickel film 106 is built up in the state of covering the insulating film 105 and the gate electrode 103. Thereafter, as shown in FIG. 8D, a heat treatment is conducted to bring the polysilicon constituting the gate electrode 103 and the nickel film 106 as an upper layer into reaction with each other, whereby the gate electrode 103 as a whole is fully silicided, to form a fully silicided gate electrode 103′.